JEDEC Publishes HBM3 Memory Standard, over 350 GB/s Bandwidth Increase Per Stack Versus HBM2e

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JEDEC, the global leader in developing open standards for the microelectronics industry, has announced the publication of the next version of its High Bandwidth Memory (HBM) DRAM standard: JESD238 HBM3.



Destined for use in the next-generation of graphics cards, accelerators, and similar high-performance products, HBM3 is set to offer an incredible uplift over its HBM2 and HBM2e predecessors, boasting higher bandwidth, an increased number of independent channels, and a wider range of densities. The new memory features data rates of up to 6.4 Gb/s per pin, enabling 819 GB/s of bandwidth for a single device, as well as per-module capacities of up to 64 GB, according to a list of key attributes shared by JEDEC:



Extending the proven architecture of HBM2 towards even higher bandwidth, doubling the per-pin data rate of HBM2 generation and...

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