AMD Could Be Prepping a Flagship Next-Gen GPU Featuring 96 Compute Units with Memory on a 512-Bit Bus

[Peter_Brosdahl]

Block diagrams rumored to be for AMD's upcoming UDNA GPUs indicate some very interesting changes ahead, including a new flagship design.

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[Marees]

Please note: Kepler suggests that current WGP (2 CUs) could be merged to a single CU (Effectively CU reduces by half)


it looks like that the RDNA 4 lineup may indeed feature four configurations according to Chiphell forum member ZhangZhonghao, who has been very accurate with his past leaks. He alleges that the top-most die would be very large, followed by a mid-tier, a small-tier and a tiny-tier SKU.

Kepler in AnandTech forum has now posted new information, well, essentially block diagrams of at least four RDNA 5 / UDNA SKUs at Anandtech Forums.

Potential AMD RDNA 5 / UDNA GPU Configurations (via Kepler_L2):​

GPU Die	Navi 5X	Navi 5X	Navi 5X	Navi 5X
Positioning	Flagship-Tier	Mid-Tier	Low-Tier	Entry-Tier
Max Compute Units	96 CUs (	40 CUs	24 CUs	12 CUs
Max Memory Bus	512-384 bit	384-192 bit	256-128 bit	128-64 bit
Max VRAM Capacity	24-32 GB	12-24 GB	8-16 GB	8-16 GB

https://wccftech.com/possible-amd-rdna-5-udna-gpu-sku-configs-point-to-96-40-24-12-cu-dies/

 

[Grimlakin]

I'm still wait and see. Right now all of the high end card news lately has ended up being an new AI Compute unit with a profit margin that I can't even imagine.