Jim Keller Plans to Sustain Moore’s Law by Stacking Chips

[Tsing]

A lot of people say Moore's law is dead, but CPU god Jim Keller thinks otherwise. Keller recently spoke to Wired on what he was up to at Intel and elaborated on a handful of technologies that could keep the theory going, at least to some extent.

The major one is stacking, whereby transistors or chips are built vertically and layered on top of one another. Intel's upcoming Lakefield design utilizes this very technique, which is supposed to increase density dramatically.

He claimed this approach will keep power consumption down by shortening the distance between different parts of a chip. Keller said that using nanowires and stacking his team had mapped a path to packing transistors 50 times more densely than possible with Intel's 10 nanometer generation of technology. “That’s basically already working,” he said.

Keller also mentioned extreme ultraviolet lithography, which can "etch smaller features into chips, and smaller transistor designs based on nano-scale wires." Then there's chiplets, whose benefits have been thoroughly demonstrated by AMD's new Ryzen parts.

Doesn’t this mean that progress will be harder won, less predictable and more expensive? Keller describes the future differently: “Weirder and cooler,” he says.

 

[Terminus]

If stacking and nano wires is the way to continue Moore's Law, than I'm all for it. I wonder what stacking would do as far as thermals go? Would we see a reduction in clock speed but an increase in IPC?

 

[rautrey]

I wonder what stacking would do as far as thermals go?

I expect thermals are going to be a significant limiting factor to "stack height". How do you dissipate heat from the middle out on a 3D stack?

 

[Peter_Brosdahl]

I expect thermals are going to be a significant limiting factor to "stack height". How do you dissipate heat from the middle out on a 3D stack?

Maybe some kind of partial substrate design around the paths? I'm just guessing.

 

[blkt]

Jim Keller will bypass the laws of thermodynamics with a series of tubes.

 

[Grimlakin]

Thermals and signals jumping between stacks will be the primary issues I would think. Electricity will take the path of least resistance. But when you get down to nanaowire distances you're going to need shielding for when the current accidentally exceeds the maximum carried voltage on a pathway.

 

[Brian_B]

Keller said that using nanowires and stacking his team had mapped a path to packing transistors 50 times more densely than possible with Intel's 10 nanometer generation of technology. “That’s basically already working,” he said.

Too bad 10nm isn't basically already working.

 

[AntiQuark]

I expect thermals are going to be a significant limiting factor to "stack height". How do you dissipate heat from the middle out on a 3D stack?

Agree.

Elon Musk might have a way of tunneling air routes through to cool it.
(j/k)

 

[Nanobot]

Agree.

Elon Musk might have a way of tunneling air routes through to cool it.
(j/k)

He's renaming his drilling company to the nanoBoring Co.

 

[Azrak]

Tiny tiny tubes for water cooling. Just don't use a cooling liquid with any coloring crap in it that will clog in 6 months minutes.

 

[Grimlakin]

Oh I got it. It will have it's own built in liquid metal cooling solution. (Nanotube Heat Pipes) that feed into the IHS basically meaning you can't take that off. Actually something like that may work. Only reason I said liquid metal was due to the size of the pipes. I don't think normal liquids will flow well unless they have much larger pipe sizes.