My observations suggest that AMD and Intel are following two different ways of designing chips.
AMD: Going about their business in a calm but determined manner. Iteratively refining their designs. They are focusing on smaller but deliverable IPC improvements.
Intel: They have been working hysterically in panic mode since Rocket Lake. All their engineers can think about is how to leapfrog AMD's designs in one fell swoop. This kind of reckless thinking is causing them to take bigger risks and they keep falling flat on their faces.
I would LOVE to knock on Pat's coconut and ask him, why in the hell did you think it was a good idea to:
Not have 12 P-cores only Alder Lake/Raptor Lake halo part?
Not have a monolithic version of Meteor Lake/Arrow Lake in case things didn't pan out the way they were hoping?
Have separate core designs for consumer and server chips when everyone had seen how successful AMD had been with their server first design approach and then trickling fundamentally the same design down to consumer chips since 2018?
Not have SMT enabled in their E-cores when AMD did enable that in their c cores? (I do know the answer to this. The E-core chip architect Stephen Robinson thinks SMT makes zero sense for consumers. Frickin' Nazi!)
Not instruct engineers strictly to start work on enabling AVX-512 in post Raptor Lake consumer chips when Rocket Lake had it and the competition has it?
Not release quad channel HEDT platform featuring slightly more expensive Raptor/Arrow Lake chips to get a leg up on the competition?